Exemplary embodiments relate to a semiconductor memory device and a method of operating the same.
A nonvolatile memory device among semiconductor memory devices has a characteristic that stored data are not lost even though the supply of power is stopped. A representative nonvolatile memory device includes a flash memory device. The flash memory device can be chiefly divided into a NOR flash memory device and a NAND flash memory device according to the structure of a memory cell array. The gate of the flash memory cell includes a tunnel insulating layer, a floating gate, a dielectric layer, and a control gate.
In the semiconductor memory device, e.g., the NAND flash memory device, a program operation and an erase operation may be performed through F-N tunneling. Electrons are accumulated in the floating gate by the program operation, and electrons accumulated in the floating gate are discharged to a substrate by the erase operation. Further, when a read operation is performed, a threshold voltage of the memory cell, shifted according to the amount of electrons accumulated in the floating gate, is detected, and data are read on the basis of a level of the detected threshold voltage.
Although the nonvolatile memory device has a characteristic that stored data are not lost even though the supply of power is stopped, different data from first stored data may be read if a long time elapses after a program operation. This is because electrons accumulated in the floating gate of the memory cell are discharged after a lapse of time. Accordingly, the threshold voltage of the memory cell may be lower than the initial programmed level. Such a characteristic of the memory cell is called a retention characteristic.